I’m currently working on a Blinky application using Zig to cross compile for my STM32F103C8T6. I started with an equivalent working example in C as a baseline check then switched to Zig to replicate the results. I’m running into compilation issues now though where the compiled binaries from both languages don’t seem to resemble each other in any way. I’ve linked my working repo below for my implementations in both languages as well as the disassembled binaries in the asm/ folder.
To highlight the issue as well, here’s the main section of the disassembled Zig binary:
800014c: 68014810 stmdavs r1, {r4, fp, lr}
8000150: 0108f021 tsteq r8, r1, lsr #32 ; <UNPREDICTABLE>
8000154: 68016001 stmdavs r1, {r0, sp, lr}
8000158: 0108f041 tsteq r8, r1, asr #32 ; <UNPREDICTABLE>
800015c: 68016001 stmdavs r1, {r0, sp, lr}
8000160: 0110f021 tsteq r0, r1, lsr #32 ; <UNPREDICTABLE>
8000164: 68016001 stmdavs r1, {r0, sp, lr}
8000168: 0110f041 tsteq r0, r1, asr #32 ; <UNPREDICTABLE>
800016c: 48096001 stmdami r9, {r0, sp, lr}
8000170: f4216801 vld2.8 {d6-d7}, [r1], r1
8000174: 60010170 andvs r0, r1, r0, ror r1
8000178: f4416801 vst2.8 {d22-d23}, [r1], r1
800017c: 60011180 andvs r1, r1, r0, lsl #3
8000180: f4216881 vld2.32 {d6-d7}, [r1], r1
8000184: 60815180 addvs r5, r1, r0, lsl #3
8000188: 60816881 addvs r6, r1, r1, lsl #17
800018c: bf004770 svclt 0x00004770
8000190: 40021018 andmi r1, r2, r8, lsl r0
8000194: 40011004 andmi r1, r1, r4