It’s also pretty easy to make this pointer tagging approach type safe in zig.
If you use the lower bits, the number you can use generally just depends on the alignment of the data you point to and is quite portable. So up to 3 bits for 8 byte aligned pointers.
If you use the upper bits you usually have more space but it’s architecture (and even cpu) dependent how much space you have and sometimes it might not even be possible because some other metadata might be stored there(like PAC and MTE on ARM). Sometimes you also have to mask your data off while in more recent times the cpu does that for you.
On x86_64 you have either 64-48=16 bits or 64-57=7 bits for 4-level and 5-level paging respectively. On ARM this depends on the page granularity and also on the version because at some point they also added another level.